Paralinguistic vocal control of interactive media: how untapped elements of voice might enhance the role of non-speech voice input in the user's experience of multimedia.

Much interactive media development, especially commercial development, implies the dominance of the visual modality, with sound as a limited supporting channel. The development of multimedia technologies such as augmented reality and virtual reality has further revealed a distinct partiality to visual media. Sound, however, and particularly voice, have many aspects which have yet to be adequately investigated. Exploration of these aspects may show that sound can, in some respects, be superior to graphics in creating immersive and expressive interactive experiences. With this in mind, this thesis investigates the use of non-speech voice characteristics as a complementary input mechanism in controlling multimedia applications. It presents a number of projects that employ the paralinguistic elements of voice as input to interactive media including both screen-based and physical systems. These projects are used as a means of exploring the factors that seem likely to affect users’ preferences and interaction patterns during non-speech voice control. This exploration forms the basis for an examination of potential roles for paralinguistic voice input. The research includes the conceptual and practical development of the projects and a set of evaluative studies. The work submitted for Ph.D. comprises practical projects (50 percent) and a written dissertation (50 percent). The thesis aims to advance understanding of how voice can be used both on its own and in combination with other input mechanisms in controlling multimedia applications. It offers a step forward in the attempts to integrate the paralinguistic components of voice as a complementary input mode to speech input applications in order to create a synergistic combination that might let the strengths of each mode overcome the weaknesses of the other

A Case Study Exploring Effective Pedagogical Practices in Teaching Art and Design Hearing-Impaired Students in Bahrain

Although the education of hearing-impaired students has significantly progressed towards achieving quality education in many countries, it is not yet clear in Bahrain how their education should be managed. There is a scarcity of research about the way that art and design can effectively be taught to the deaf. Moreover, there seems to be a misconception that art and design can be easily taught to people with hearing impairments. However, there may be challenges that could prove this assumption to be incorrect. Therefore, this paper attempts to examine the challenges faced by hearing-impaired students and to recommend how best educators can help them overcome these challenges. The research employs a descriptive case study method to collect data from a hearing-impaired Art and Design student, in order to identify the difficulties she encountered, the preferences she had, and the approaches she used to facilitate her educational experience. The paper aims to find and recommend effective approaches to implement teaching strategies that Art and Design educators in Bahrain can use in order to empower these students. It also aims to investigate how their peers can best help them integrate more easily into the classroom and comfortably coexist within an educational setting

Photovoltaic sample-and-hold circuit enabling MPPT indoors for low-power systems

Photovoltaic (PV) energy harvesting is commonly used to power autonomous devices, and maximum power point tracking (MPPT) is often used to optimize its efficiency. This paper describes an ultra low-power MPPT circuit with a novel sample-and-hold and cold-start arrangement, enabling MPPT across the range of light intensities found indoors, which has not been reported before. The circuit has been validated in practice and found to cold-start and operate from 100 lux (typical of dim indoor lighting) up to 5000 lux with a 55cm2 amorphous silicon PV module. It is more efficient than non-MPPT circuits, which are the state-of-the-art for indoor PV systems. The proposed circuit maximizes the active time of the PV module by carrying out samples only once per minute. The MPPT control arrangement draws a quiescent current draw of only 8uA, and does not require an additional light sensor as has been required by previously-reported low-power MPPT circuits

Energy Harvesting and Management for Wireless Autonomous Sensors

Wireless autonomous sensors that harvest ambient energy are attractive solutions, due to their convenience and economic benefits. A number of wireless autonomous sensor platforms which consume less than 100?W under duty-cycled operation are available. Energy harvesting technology (including photovoltaics, vibration harvesters, and thermoelectrics) can be used to power autonomous sensors. A developed system is presented that uses a photovoltaic module to efficiently charge a supercapacitor, which in turn provides energy to a microcontroller-based autonomous sensing platform. The embedded software on the node is structured around a framework in which equal precedent is given to each aspect of the sensor node through the inclusion of distinct software stacks for energy management and sensor processing. This promotes structured and modular design, allowing for efficient code reuse and encourages the standardisation of interchangeable protocols

Reducing Interconnect Cost in NoC through Serialized Asynchronous Links

This work investigates the application of serialization as a means of reducing the number of wires in NoC combined with asynchronous links in order to simplify the clocking of the link. Throughput is reduced but savings in routing area and reduction in power could make this attractiv

Aging Benefits in Nanometer CMOS Designs

This document is the Accepted Manuscript version of the following article: Daniele Rossi, Vasileios Tenentes, Sheng Yang, Saqib Khursheed, and Bashir M. Al-Hashimi, ‘Aging Benefits in Nanometer CMOS Designs’, IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 64 (3), May 2016. © 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.n this brief, we show that bias temperature instability (BTI) aging of MOS transistors, together with its detrimental effect for circuit performance and lifetime, presents considerable benefits for static power consumption due to subthreshold leakage current reduction. Indeed, static power reduces considerably, making CMOS circuits more energy efficient over time. Static power reduction depends on transistor stress ratio and operating temperature. We propose a simulation flow allowing us to properly evaluate the BTI aging of complex circuits in order to estimate BTI-induced power reduction accurately. Through HSPICE simulations, we show 50% static power reduction after only one month of operation, which exceeds 78% in ten years. BTI aging benefits for power consumption are also proven with experimental measurements.Peer reviewedFinal Accepted Versio

Vibration-powered sensing system for engine condition monitoring

Condition monitoring is becoming an established technique for managing the maintenance of machinery in transport applications. Vibration energy harvesting allows wireless systems to be powered without batteries, but most traditional generators have been designed to operate at fixed frequencies. The variety of engine speeds (and hence vibration frequencies) in transport applications therefore means that these are not usable. This paper describes the application-driven specification, design and implementation of a novel vibration-powered sensing system for condition monitoring of engines. This demonstrates that, through careful holistic design of the entire system, condition monitoring systems can be powered solely from machine vibration, managing their energy resources and transmitting sensed data wirelessly

Leakage Current Analysis for Diagnosis of Bridge Defects in Power-Gating Designs

Manufacturing defects that do not affect the functional operation of low power Integrated Circuits (ICs) can nevertheless impact their power saving capability. We show that stuck-ON faults on the power switches and resistive bridges between the power networks can impair the power saving capability of power-gating designs. For quantifying the impact of such faults on the power savings of power-gating designs, we propose a diagnosis technique that targets bridges between the power networks. The proposed technique is based on the static power analysis of a power-gating design in stand-by mode and it utilizes a novel on-chip signature generation unit, which is sensitive to the voltage level between power rails, the measurements of which are processed off-line for the diagnosis of bridges that can adversely affect power savings. We explore, through SPICE simulation of the largest IWLS’05 benchmarks synthesised using a 32 nm CMOS technology, the trade-offs achieved by the proposed technique between diagnosis accuracy and area cost and we evaluate its robustness against process variation. The proposed technique achieves a diagnosis resolution that is higher than 98.6% and 97.9% for bridges of R ≳ 10MΩ(weak bridges) and bridges of R ≲ 10MΩ (strong bridges), respectively, and a diagnosis accuracy higher than 94.5% for all the examined defects. The area overhead is small and scalable: it is found to be 1.8% and 0.3% for designs with 27K and 157K gate equivalents, respectively

Reliable Power Gating with NBTI Aging Benefits

In this paper, we show that Negative Bias Temperature Instability (NBTI) aging of sleep transistors (STs), together with its detrimental effect for circuit performance and lifetime, presents considerable benefits for power gated circuits. Indeed, it reduces static power due to leakage current, and increases ST switch efficiency, making power gating more efficient and effective over time. The magnitude of these aging benefits depends on operating and environmental conditions. By means of HSPICE simulations, considering a 32nm CMOS technology, we demonstrate that static power may reduce by more than 80% in 10 years of operation. Static power decrease over time due to NBTI aging is also proven experimentally, using a test-chip manufactured with a TSMC 65nm technology. We propose an ST design strategy for reliable power gating, in order to harvest the benefits offered by NBTI aging. It relies on the design of STs with a proper lower Vth compared to the standard power switching fabric. This can be achieved by either re-designing the STs with the identified Vth value, or applying a proper forward body bias to the available power switching fabrics. Through HSPICE simulations, we show lifetime extension up to 21.4X and average static power reduction up to 16.3% compared to standard ST design approach, without additional area overhead. Finally, we show lifetime extension and several performance-cost trade-offs when a target maximum lifetime is considered